Microelectromechanical (MEM) systems comprise integrated micro devices, such as mechanical components, formed on a substrate material. The systems, which are fabricated using integrated circuit batch processing techniques, range in size from nanometers to millimeters. MEMS devices are operable individually to sense, control, and actuate on a micro scale, or can function in arrays to generate effects on a macro scale. Current MEMS device applications include accelerometers, inertial and angular sensors, pressure sensors, chemical and flow sensors, micro-optics devices, optical scanners, fluid flow devices, chemical sensing and chemical delivery systems, and biological sensors. In one application, MEMS devices are formed with micro-channels in a substrate and layered devices for use in chemical and biological analysis according to the channel dimensions.
MEMS devices further comprise electronic components in the form of integrated circuit devices formed on the same silicon chip as a mechanical MEMS device. Advantageously, MEMS devices reduce the size and weight of mechanical and electromechanical systems when compared with conventional mechanical systems.
Fabrication of MEMS devices employs many of the same processing steps as the fabrication of integrated circuits. In particular, the formation of a MEMS device involves depositing and patterning thin films on a substrate surface, such as a silicon wafer surface, to produce complex microstructures. Common thin film materials (applied with a thickness on the order of micrometers or less) include silicon dioxide, silicon nitride, polycrystalline silicon (poly), amorphous silicon, aluminum, refractory metals and silicides. To provide mechanical movement for MEMS devices, it is necessary to decouple the structural elements to form a gap between the moving elements. Thus a selective etch process is used to form the gap by removing material without affecting the operative structures.
After depositing a material layer, photolithographic masking, patterning and etching steps are employed to remove the unwanted material. Generally, etch processes fall into two categories, wet etching and dry etching. According to a wet etch chemistry, the structure is immersed in or exposed to a liquid chemical bath containing an etchant solution, for example a buffered HF solution, until the unwanted material has been removed. For more effective wet etching, the wafer is mechanically or ultrasonically agitated during immersion in the etchant bath. Wet etching requires contact between the material layer to be removed and the etchant solution. The contact occurs along one or more exposed surfaces or edges of the material layer. If the surface or edge is not sufficiently accessible to the etchant, an opening may be formed in the overlying layers, extending down to the material layer, providing a path along which the etchant may flow to contact and etch the material. Following completion of the wet etch process the wafer is rinsed and spun dry.
Generally, etchants are subdivided into two broad categories, referred to as isotropic etchants and anisotropic etchants. Wet isotropic etchants, which are available for silicon dioxide, nitrides, aluminum, polysilicon, gold, and silicon, attack the material at the substantially the same rate in all directions, removing material vertically and horizontally under the photolithographic etch mask. In some applications, significant undesirable horizontal etching, referred to as undercutting, can occur during the isotropic etch process. Anisotropic etchants attack the material layers at different rates in different directions and may be applied to achieve greater control or geometric selectivity during the material removal process.
In addition to geometric selectivity, etchants are also material selective, that is, a specific etch chemistry etches different materials at different etch rates. For example, hydrofluoric acid (HF) etches silicon dioxide without significantly attacking silicon. However, wet etchants that are effective in removing silicon dioxide and silicon generally do not exhibit satisfactory selectivity to preserve metals, such as aluminum. Generally, in the fabrication of integrated circuit devices and MEMS structures, it has been difficult to remove silicon or silicon dioxide without substantially eroding adjacent aluminum or other metallized features.
Dry etch processes typically use a gas as the primary etchant without accompanying wet chemicals or rinses. Some dry etch processes are less aggressive than wet processes, allowing the formation of smaller and more delicate structures on the wafer surface due to the decreased risk of structure damage.
Downstream plasma etching, one type of dry etching, applies plasma energy to a gas, initiating a chemical reaction that performs the material etching. A plasma etching system comprises a chamber, vacuum system, gas supply, power supply and microwave source (or another suitable radio frequency signal source). Wafers are loaded into the chamber and positioned on a grounded platen disposed below a microwave-energized electrode. The chamber pressure is reduced to establish a vacuum and a gas (or a combination of gasses) is introduced into a microwave plasma tube. For example, when etching silicon dioxide, CF4 is mixed with oxygen, which serves as a passivating agent. As the gas mixture flows into the chamber, the microwave source supplies energy to the plasma tube, dissociating the CF4 into a cloud of fluorine and carbon radicals. In this state, the fluorine attacks and etches the silicon dioxide, converting it to volatile components that are removed from the chamber by the vacuum system.
In addition to material and directional selectivity mentioned above, a limitation common to both wet and dry etch techniques is the inability to compensate for etch rate variations due to dimension and size variations, i.e., variations in line density, critical dimension, open area percentage and layer thickness, in the structure to be etched. For example, a substrate area with large critical dimensions generally experiences a higher etch rate than a region with small critical dimensions. In general, areas with higher etch rates will etch through a material layer, and begin to etch an underlying layer in advance of regions having slower etch rates. To overcome this difficulty, the duration of an etch process is typically determined by the etch rate of the region experiencing the slowest etch rate, thereby achieving complete removal of the material to be etched. Also, non-critical features are compensated in the physical layout to account for the etch rate variations based on feature size to achieve the desired final feature size.
FIGS. 1A, 1B and 2 illustrate a prior art process for forming a MEMS device on a silicon substrate 10. As shown in FIG. 1A, a sacrificial layer 12 (conventionally silicon dioxide) is formed over the substrate 10. The MEMS device is formed in an overlying structural layer 14 (conventionally polysilicon). In this example, the structural layer 14 is masked, patterned, and etched to produce an elongated member 15, as illustrated in the top view of FIG. 1B. Any of the known dry or wet etching processes can be employed to form the elongated member 15 from the structural layer 14. The wafer then undergoes a wet etch to remove a significant portion of the sacrificial layer 12, freeing the elongated member 15 to form a cantilevered beam 16, as illustrated in FIG. 2. The wafer is removed from the etch bath before the entire sacrificial layer 12 is etched away, such that a region 12A remains as support for the cantilevered beam 16. Thus the removal of a portion of the sacrificial layer 12 decouples the elongated member 15 from the substrate 10, allowing the cantilevered portion of the beam 16 to move relative to the substrate 10.
MEMS devices comprising partially enclosed chambers can also be fabricated on the surface of the substrate 10, as illustrated in FIGS. 3A, B, C and D. A sacrificial layer is deposited over the substrate 10 and etched to form a sacrificial mesa 20 that defines a volume for the MEMS chamber. See FIG. 3A. A polysilicon layer 22 is deposited over the substrate 10 and the mesa 20 as illustrated in FIG. 3B. Next a window 24 is etched (conventionally by dry reactive ion etching) through the polysilicon layer 22. See FIG. 3C. The wafer is then immersed in a wet etch solution, removing the mesa 20 and leaving a windowed chamber 26.
According to the prior art, etch material selectivity issues can limit the materials of MEMS structures and integrated circuit devices, as known etch chemistries may not exhibit sufficient selectivities for preferred candidate materials. Providing etchant access to sacrificial layers can also be problematic as etch contact with the sacrificial layer requires access through a suitably sized opening or along an edge of the substrate.